View 49FCT806TDATASHEET_968241.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

IDT49FCT806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS BUFFER/CLOCK DRIVER
IDT49FCT806BT/CT
FEATURES:
* * * * * * * * * * *
0.5 MICRON CMOS Technology Guaranteed low skew < 500ps (max.) Very low duty cycle distortion < 600ps (max.) Low CMOS power levels TTL compatible inputs and outputs TTL level output voltage swings High drive: -32mA IOH, +48mA IOL Two independent output banks with 3-state control 1:5 fanout per bank "Heartbeat" monitor output ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * Available in the following packages: - Commercial: QSOP, SOIC, SSOP - Military: CERDIP, LCC
DESCRIPTION:
This buffer/clock driver is built using advanced dual metal CMOS technology. The FCT806T is an inverting clock driver consisting of two banks of drivers. Each bank drives five TTL output buffers from a standard TTL compatible input. This part has extremely low output skew, pulse skew, and package skew. The device has a "heart-beat" monitor for diagnostics and PLL driving. The monitor output is identical to all other outputs and complies with the output specifications in this document. The FCT806T is designed for fast, clean edge rates to provide accurate clock distribution in high speed systems.
FUNCTIONAL BLOCK DIAGRAM
OEA
INA
5 OA1-OA5
INB
5 OB1-OB5
OEB
MON
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
c 2000 Integrated Device Technology, Inc.
JULY 2000
DSC-4772/2
IDT49FCT806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
OA2 OA1 OB1 VCC VCC
INDEX
VCC OA1 OA2 OA3 GND OA4 OA5 GND
(1)
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC OB1 OB2 OB3 GND OB4 OB5 MON OEB INB
3 OA3 GND OA4 OA5 GND
(1)
2 1
20 19 18 17 16 15 14 OB2 OB3 GND OB4 OB5
4 5 6 7 8 9
OEA
10 11 12 13
MON
Outputs
OEA INA
QSOP/ SOIC/ SSOP/ CERDIP TOP VIEW
NOTE: 1. Pin 8 is internally connected to GND. To insure compatibility with all products, pin 8 should be connected to GND at the board level.
LCC TOP VIEW
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM TSTG IOUT Description Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max -0.5 to +7 -65 to +150 -60 to +120 Unit V C mA
PIN DESCRIPTION
Pin Names OEA, OEB INA, INB OAx, OBx MON Clock Inputs Clock Outputs Monitor Output Description 3-State Output Enable Inputs (Active LOW)
NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
FUNCTION TABLE (1)
Inputs OEA, OEB INA, INB L H L H OAx, OBx H L Z Z L L MON H L H L
CAPACITANCE (TA = +25OC, f = 1.0MHz)
Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 4.5 5.5 Max. 6 8 Unit pF pF
H H
NOTE: 1. H = HIGH L = LOW Z = High-Impedance
NOTE: 1. This parameter is measured at characterization but not tested.
2
OEB
INA
INB
IDT49FCT806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Commercial: TA = 0C to +70C, VCC = 5V 5%: Military: TA = -55C to +125C, VCC = 5V 10%
Symbol VIH VIL IIH IIL IOZH IOZL II VIK IOS VOH Parameter Input HIGH Level Input LOW Level Input HIGH Current(5) Input LOW Current(5) High Impedance Output Current (3-State Output Pins) Input HIGH Current Clamp Diode Voltage Short Circuit Current Output HIGH Voltage VCC = Min., IIN = -18mA VCC = Max., VO = VCC = Min. VIN = VIH or VIL GND(3) IOH = -12mA MIL IOH = -15mA COM'L IOH = -24mA MIL IOH = -32mA COM'L(4) VOL IOFF VH ICCL ICCH ICCZ
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Duration of the condition should not exceed one second. 5. The test limit for this parameter is 5A at TA = -55C.
Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max. VI = 2.7V VI = 0.5V VO = 2.7V VO = 0.5V VCC = Max., VI = VCC (Max.)
Min. 2 -- -- -- -- -- -- -- -60 2.4 2 -- -- -- --
Typ.(2) -- -- -- -- -- -- -- -0.7 -120 3.3 3 0.3 -- 150 5
Max. -- 0.8 1 1 1 1 1 -1.2 -255 -- -- 0.55 1 -- 500
Unit V V A A A A V mA V V V A mV A
Output LOW Voltage Input/Output Power Off Leakage(5) Input Hysteresis for all inputs Quiescent Power Supply Current
VCC = Min. VIN = VIH or VIL --
IOL = 32mA MIL IOL = 48mA COM'L
VCC = 0V, VIN or VO 4.5V VCC = Max., VIN = GND or VCC
3
IDT49FCT806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open OEA = OEB = GND 50% Duty Cycle IC Total Power Supply Current(6) VCC = Max. Outputs Open fO = 25MHz 50% Duty Cycle OEA = OEB = VCC Mon. Output Toggling VCC = Max. Outputs Open fO = 50MHz 50% Duty Cycle OEA = OEB = GND Eleven Outputs Toggling
NOTES: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at VCC = 5V, +25C ambient. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. Values for these conditions are examples of the IC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fONO) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fO = Output Frequency NO = Number of Outputs at fO All currents are in milliamps and all frequencies are in megahertz.
Test Conditions(1)
Min. --
Typ.(2) 0.5 60
Max. 2 100
Unit mA A/MHz
VIN = VCC VIN = GND
--
VIN = VCC VIN = GND VIN = 3.4V VIN = GND VIN = VCC VIN = GND VIN = 3.4V VIN = GND
--
1.5
3
--
1.8
4
--
33
55.5
(5)
mA
--
33.5
57.5
(5)
4
IDT49FCT806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - MILITARY(1,2)
Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(PP) Parameter Propagation Delay INA to OAx, INB to OBx Output Rise Time Output Fall Time Output skew: skew between outputs of all banks of same package (inputs tied together) Pulse skew: skew between opposite transitions of same output (|tPHL -- tPLH|) Part-to-part skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade Output Enable Time OEA to OAx, OEB to OBx Output Disable Time OEA to OAx, OEB to OBx Conditions(3) CL = 50pF RL = 500 FCT806BT Min.(4) Max. 1.5 -- -- -- -- -- 5.7 2 1.5 0.9 0.9 1.5 FCT806CT Min.(4) Max. 1.5 -- -- -- -- -- 5.2 2 1.5 0.7 0.8 1.2 Unit ns ns ns ns ns ns
tPZL tPZH tPLZ tPHZ
1.5 1.5
6.5 6.5
1.5 1.5
6 6
ns ns
NOTES: 1. tPLH, tPHL, and tSK(pp) are production tested. All other parameters are guaranteed but not production tested. 2. Propagation delay range indicated by Min. and Max. limit is dues to Vcc, operating temperature, and process parameters. These propagation delay limits do not imply skew. 3. See Test Circuits and Waveforms. 4. Minimum limits are guaranteed but not tested on Propagation Delays.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL(1,2)
Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(PP) Parameter Propagation Delay INA to OAx, INB to OBx Output Rise Time Output Fall Time Output skew: skew between outputs of all banks of same package (inputs tied together) Pulse skew: skew between opposite transitions of same output (|tPHL -- tPLH|) Part-to-part skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade tPZL tPZH tPLZ tPHZ Output Enable Time OEA to OAx, OEB to OBx Output Disable Time OEA to OAx, OEB to OBx 1.5 1.5 6 6 1.5 1.5 5 5 ns ns Conditions(3) CL = 50pF RL = 500 FCT806BT Min.(4) Max. 1.5 -- -- -- -- -- 5 1.5 1.5 0.7 0.7 1.2 FCT806CT Min.(4) Max. 1.5 -- -- -- -- -- 4.5 1.5 1.5 0.5 0.6 1 Unit ns ns ns ns ns ns
NOTES: 1. tPLH, tPHL, and tSK(pp) are production tested. All other parameters are guaranteed but not production tested. 2. Propagation delay range indicated by Min. and Max. limit is dues to Vcc, operating temperature, and process parameters. These propagation delay limits do not imply skew. 3. See Test Circuits and Waveforms. 4. Minimum limits are guaranteed but not tested on Propagation Delays.
5
IDT49FCT806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
VCC 500 Pulse Generator VIN D.U.T. 50pF RT 500 CL VOUT 7V
SWITCH POSITION
Test Disable LOW Enable LOW Disable HIGH Enable HIGH Switch Closed GND
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
3V 1.5V INPUT tPLH tPHL 0V VOH 2.0V OUTPUT tR tF 0.8V 1.5V VOL OUTPUT 2 tPLH2 3V 1.5V INPUT tPLH tPHL 0V VOH 1.5V OUTPUT tSK(p) = tPHL - tPLH VOL INPUT tPLH1 tPHL1 tSK(o) = tPLH2 - tPLH1
or
3V 1.5V INPUT tPLH1 tPLH1 0V VOH 1.5V OUTPUT 1 tSK(o) tSK(o) VOL VOH 1.5V VOL tPHL2 tPHL2 - tPHL1
Package Delay
Output Skew
3V 1.5V 0V VOH PACKAGE 1 OUTPUT 1.5V tSK(pp) PACKAGE 2 OUTPUT tPLH2 tSK(p) = tPLH2 - tPLH1
or
Pulse Skew - tSK(P)
ENABLE CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH
SWITCH CLOSED
DISABLE
tPLZ 3.5V 1.5V tPHZ 1.5V 0V
3V 1.5V 0V
tSK(pp)
VOL VOH 1.5V VOL
3.5V 0.3V VOL 0.3V VOH 0V
tPHL2 tPHL2 - tPHL1
tPZH
SWITCH OPEN
Part-to-Part Skew - tSK(PP)
NOTE: 1. Package 1 and Package 2 are same device type and speed grade.
Enable and Disable Times
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns
6
IDT49FCT806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT49FCT XXXX Device Type XX Package X Process Blank B Commercial (0C to +70C) MIL-STD-883, Class B (- 55C to +125C) Commercial Options Small Outline IC Quarter-size Small Outline Package Shrink Small Outline Package Military Options CERDIP Leadless Chip Carrier
SO Q PY
D L
806BT 806CT
Fast CMOS Buffer/Clock Driver
CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054
for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com
for Tech Support: logichelp@idt.com (408) 654-6459
7

▲Up To Search▲

Price & Availability of 49FCT806TDATASHEET

	To Download 49FCT806TDATASHEET Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .